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TS PGECET
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Instrumentation Engineering
List of top Instrumentation Engineering Questions on Digital Electronics and Logic Gates asked in TS PGECET
A 4-bit synchronous counter with series carry uses flip-flops and two AND gates with propagation delays of 30 ns and 10 ns respectively. The max time between successive clock pulses is:
TS PGECET - 2024
TS PGECET
Instrumentation Engineering
Digital Electronics and Logic Gates
Which of the following has the refreshing circuitry?
TS PGECET - 2024
TS PGECET
Instrumentation Engineering
Digital Electronics and Logic Gates
Which of the following logic families has the highest fan-out?
TS PGECET - 2024
TS PGECET
Instrumentation Engineering
Digital Electronics and Logic Gates
The result of \( 45_{10} - 45_{16} \), expressed in 6-bit 2's complement, is:
TS PGECET - 2024
TS PGECET
Instrumentation Engineering
Digital Electronics and Logic Gates
The binary representation of the decimal number 1.375 is:
TS PGECET - 2024
TS PGECET
Instrumentation Engineering
Digital Electronics and Logic Gates
The minimum number of flip-flops required to design a mod-10 counter is:
TS PGECET - 2024
TS PGECET
Instrumentation Engineering
Digital Electronics and Logic Gates
The output \( Q_{n+1} \) of a JK flip-flop for the input \( J = 1, K = 1 \) is:
TS PGECET - 2024
TS PGECET
Instrumentation Engineering
Digital Electronics and Logic Gates
The combinational circuit shown uses a 4x1 multiplexer. The output \( Q \) of the circuit is:
TS PGECET - 2024
TS PGECET
Instrumentation Engineering
Digital Electronics and Logic Gates
The expression \( a = \overline{AB} \) is equal to:
TS PGECET - 2024
TS PGECET
Instrumentation Engineering
Digital Electronics and Logic Gates
The minimal sum of products form of \( f = \overline{A}BCD + \overline{A}BCD + BCD + \overline{A}BC \) is:
TS PGECET - 2024
TS PGECET
Instrumentation Engineering
Digital Electronics and Logic Gates
A computer has a memory space of \( 2^{16} \) and word length of 24 bits. Each memory chip has 10 address lines and 8 data lines. Number of chips required is:
TS PGECET - 2024
TS PGECET
Instrumentation Engineering
Digital Electronics and Logic Gates
The Boolean expression \( \overline{A + B + \overline{C}} \) is equal to:
TS PGECET - 2024
TS PGECET
Instrumentation Engineering
Digital Electronics and Logic Gates
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