List of top Signals and Systems Questions on Representation of continuous and discrete time signals asked in GATE EE

A counter uses three D flip-flops generating the Gray code sequence 000, 001, 011, 010, 110, 111, 101, 100 repeatedly. The bits are in $Q_2 Q_1 Q_0$ format. The combinational logic expression for $D_1$ is \(\underline{\hspace{1cm}}\).
A 16-bit synchronous binary up-counter is clocked with frequency \(f_{CLK}\). The two most significant bits are OR-ed to form output Y. Y remains high for 24 ms. The clock frequency \(f_{CLK}\) is \(\underline{\hspace{1cm}}\) MHz. (Round off to 2 decimal places.)