List of top Analog and Digital Electronics Questions on Active Filters asked in GATE EE

Consider the state-space model:

\[ \dot{x}(t) = A x(t) + B u(t) \] \[ y(t) = C x(t) \] \[ A = \begin{bmatrix} 0 & 1 \\ -2 & -3 \end{bmatrix}, \quad B = \begin{bmatrix} 0 \\ 1 \end{bmatrix}, \quad C = \begin{bmatrix} 1 & 0 \end{bmatrix} \]

The sum of the magnitudes of the poles is:

A controller \( (1 + K_{DS}) \) is to be designed for the plant \[ G(s) = \frac{1000 \sqrt{2}}{s(s + 10)^2} \] The value of \( K_D \) that yields a phase margin of 45 degrees at the gain cross-over frequency of 10 rad/sec is ……… (round off to 1 decimal place).

The input voltage \( v(t) \) and current \( I(t) \) of a converter are given by: \[ v(t) = 300 \sin(\omega t) \, \text{V} \] \[ i(t) = 10 \sin(\omega t - \frac{\pi}{6}) + 2 \sin(3 \omega t + \frac{\pi}{6}) + \sin(5 \omega t + \frac{\pi}{2}) \, \text{A} \] Where \( \omega = 2\pi \times 50 \, \text{rad/s} \), the input power factor of the converter is closest to:

The maximum clock frequency in MHz of a 4-stage ripple counter, utilizing flip-flops, with each flip-flop having a propagation delay of 20 ns, is _________. (round off to one decimal place)